Solvers and Eigensolvers for Multicore Processors
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1 Solvers and Eigensolvers for Multicore Processors Paolo Bientinesi AICES, RWTH Aachen Max-Plank-Institute für biologische Kybernetik March 18th, 2011 Tübingen, Germany Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
2 1 Introduction 2 Part #1: Solvers 3 Part #2: Eigensolvers 4 Conclusions Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
3 Dense Linear Algebra Kernels Matrix-matrix multiplication (GEMM): C C + AB Factorizations: Linear system: Transformations: Matrix Equations: Eigenproblems: Generalized eigenproblems:... LU = A, LL T = A, QR = A AX = B QAQ T = T, QA = H AX + XB = C AZ = ZΛ AZ = BZΛ Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
4 Dense Linear Algebra Kernels Matrix-matrix multiplication (GEMM): C C + AB Factorizations: Linear system: Transformations: Matrix Equations: Eigenproblems: Generalized eigenproblems:... LU = A, LL T = A, QR = A AX = B QAQ T = T, QA = H AX + XB = C AZ = ZΛ AZ = BZΛ Objective: High-performance Numerical stability Multiple algorithmic variants Multiple implementations Multicore Multiple types of parallelism! Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
5 Multi-cores: standard (computing) architecture Multi-cores invasion: 499/500 entries of the Top 500 Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
6 Multi-cores: standard (computing) architecture Multi-cores invasion: 499/500 entries of the Top cores, 8 cores, cores,... More parallelism than we know what to do with? Is multi-threaded BLAS the solution for LA libs? Linear solvers Eigensolvers Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
7 Linear Algebra: Modularity! Algorithms expressed in terms of simpler linear algebra operations Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
8 Linear Algebra: Modularity! Algorithms expressed in terms of simpler linear algebra operations BLAS: Basic Linear Algebra Subroutines BLAS-1: y := y + αx x, y R n β := α + x T y BLAS-2: y := y + Ax A R n n, x, y R n y := A 1 x BLAS-3: C := C + AB A, B, C R n n C := A 1 B ESSL (IBM), MKL (Intel), ATLAS, GotoBLAS,... Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
9 Example: AX = B AX = B Linear System LU = A LU Factorization LX = B Triangular System LX = B Triangular System C = AB + C Gemm C = AB + C Gemm C = AB + C Gemm Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
10 Performance of BLAS Single threaded GEMM 1 Efficiency of GEMM 0.8 Efficiency Matrix dimension Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
11 1 Introduction 2 Part #1: Solvers 3 Part #2: Eigensolvers 4 Conclusions Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
12 LU factorization: loop-based algorithm Iteration i: completed DONE DONE PARTIALLY DONE COMPUTED Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
13 LU factorization: loop-based algorithm Iteration i+1: repartitioning Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
14 LU factorization: loop-based algorithm Iteration i+1: computation LU GEMM Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
15 LU factorization: loop-based algorithm Iteration i+1: completed (boundary shift) DONE PARTIALLY DONE COMPUTED Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
16 Parallelism? Solution #1: Multithreaded BLAS LU GEMM Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
17 Parallelism? Solution #1: Multithreaded BLAS LU GEMM Advantage: ease of use. Legacy code! Drawback: synchronization. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
18 Performance of BLAS Multithreaded GEMM 1 Efficiency of GEMM 0.8 Efficiency thread 4 threads 8 threads Matrix dimension Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
19 Example: SPD Inverse Inversion of a Symmetric Positive Definite matrix Covariance matrix Very large dense problems Cholesky factorization Triangular inversion Matrix-matrix multiplication Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
20 Example: SPD Inverse Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
21 Parallelism: can we do better? Solution #2: Algorithms by blocks Advantage: out of order execution. Advantage: parallelism limited only by the data dependencies between operations. Drawback: plateux. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
22 Cholesky factorization LL T = A CHOL CHOL SYRK SYRK Iteration 1 Iteration 2 Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
23 Algorithms by blocks Creating small tasks CHOL CHOL SYRK SYRK Iteration 1 Iteration 2 Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
24 Decomposing the computation Iteration 1 CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
25 Decomposing the computation Iteration 2 CHOL SYRK GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
26 Decomposing the computation Iteration 3 CHOL SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
27 Decomposing the computation Iteration 4 CHOL Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
28 Dependencies CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
29 Dependencies CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
30 Dependencies CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
31 Dependencies CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
32 Dependencies CHOL SYRK GEMM SYRK GEMM GEMM SYRK Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
33 DAG - Dependencies 4 4-tile matrix CHOL SYRK GEMM GEMM SYRK GEMM SYRK CHOL 3 3 SYRK GEMM SYRK CHOL SYRK CHOL Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
34 Task Execution 4 4-tile matrix Stage Scheduled Tasks 1 CHOL 2 3 SYRK GEMM SYRK GEMM 4 GEMM SYRK GEMM GEMM 5 GEMM SYRK CHOL 6 7 SYRK GEMM SYRK GEMM 8 GEMM SYRK CHOL 9 10 SYRK GEMM SYRK 11 CHOL SYRK 14 CHOL Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
35 SPD Inverse again: Chol+Inv+GEMM 5 5-tile matrix Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
36 SPD Inverse again: Chol+Inv+GEMM 5 5-tile matrix Stage Scheduled Tasks 1 CHOL 2 3 SYRK GEMM SYRK GEMM 4 GEMM SYRK GEMM GEMM 5 GEMM SYRK CHOL 6 7 TRINV SYRK 8 GEMM SYRK GEMM GEMM 9 SYRK TTMM CHOL GEMM GEMM GEMM SYRK 12 GEMM SYRK CHOL 13 TRINV SYRK 14 GEMM GEMM GEMM 15 GEMM TRMM SYRK 16 TTMM CHOL 17 SYRK TRINV GEMM SYRK 18 GEMM GEMM GEMM TRMM 19 TRMM TTMM SYRK GEMM SYRK 22 TRINV GEMM GEMM TRINV 23 SYRK SYRK GEMM SYRK 24 TRMM GEMM TRMM GEMM 25 TRMM SYRK GEMM GEMM 26 TTMM GEMM TRMM TRMM 27 SYRK TRMM 28 TRMM 29 TTMM Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
37 Cholesky, algorithm by block Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
38 Multithreaded vs. algorithm by block Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
39 Part 1: Summary Multithreaded BLAS vs. Algorithms by blocks No absolute winner: crossover! Ease of use Synchronization Out of order execution Parallelism dictated by data dependencies Plateux Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
40 1 Introduction 2 Part #1: Solvers 3 Part #2: Eigensolvers 4 Conclusions Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
41 Problem AX = XΛ Input: A C n n, A H =A; #eigenpairs: 1 k n Output: X C n k eigenvectors Λ R k k eigenvalues Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
42 Problem AX = XΛ Input: A C n n, A H =A; #eigenpairs: 1 k n Output: X C n k eigenvectors Λ R k k eigenvalues Approach T = Q H AQ Reduction to tridiagonal form O(n 3 ) T Z = ZΛ Tridiagonal eigenproblem O(kn) O(n 3 ) X = QZ Backtransformation O(kn 2 ) Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
43 Problem AX = XΛ Input: A C n n, A H =A; #eigenpairs: 1 k n Output: X C n k eigenvectors Λ R k k eigenvalues Approach T = Q H AQ Reduction to tridiagonal form O(n 3 ) T Z = ZΛ Tridiagonal eigenproblem O(kn) O(n 3 ) X = QZ Backtransformation O(kn 2 ) Algorithms Inverse Iteration (1958): subsets O(kn 2 ) QR (1961): high-accuracy O(n 3 ) Divide & Conquer (1981): parallel, BLAS3 O(n 3 ) MRRR (1997): subsets, no re-orth. O(kn) Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
44 Multi-threaded BLAS? Time in seconds MRRR (MKL) DC (MKL) QR (MKL) BI (MKL) Number of threads Time in seconds MRRR (MKL) MRRR (LAPACK) DC (MKL) Number of threads Tridiagonal eigensolver, matrix size=4289, from DFT. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
45 More motivation?... it s O(n 2 ) anyway Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
46 More motivation?... it s O(n 2 ) anyway Fraction of execution time N = 4,289 Backtransformation Sequential MRRR Reduction Number of threads If not properly parallelized, even O(n 2 ) dominates! Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
47 1 Introduction 2 Part #1: Solvers 3 Part #2: Eigensolvers 4 Conclusions Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
48 MRRR Dhillon & Parlett Multiple Relatively Robust Representations first stable algorithm to compute k eigenpairs in O(nk) ops no reorthogonalization Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
49 MRRR Dhillon & Parlett Multiple Relatively Robust Representations first stable algorithm to compute k eigenpairs in O(nk) ops no reorthogonalization 1) eigenvalues 2) eigenvectors + eigenvalues eigenvalues: Bisection or dqds eigenvectors: Compute 1(λ, z) Scan λ s sep. cluster Shift New RRR λ s refine Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
50 MRRR Dhillon & Parlett Multiple Relatively Robust Representations first stable algorithm to compute k eigenpairs in O(nk) ops no reorthogonalization 1) eigenvalues 2) eigenvectors + eigenvalues eigenvalues: Bisection or dqds eigenvectors: Compute 1(λ, z) Scan λ s sep. cluster Shift New RRR λ s refine Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
51 Representation Tree Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
52 The work queue Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
53 Example trace: 16 cores eigenvectors Matrix size: Execution time: 3.3s Sequential: 49.3s (LAPACK) Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
54 MR3-SMP: execution time Time in seconds MR 3 SMP MRRR (MKL) DC (MKL) QR (MKL) BI (MKL) Number of threads Time in seconds MR 3 SMP MRRR (MKL) MRRR (LAPACK) DC (MKL) Number of threads Matrix size: Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
55 A larger example: look at the scale! Matrix size: Frequency response analysis of automobiles. 600 N = N = Time in minutes MR 3 SMP MRRR (MKL) DC (MKL) QR (MKL) BI (MKL) Time in seconds MR 3 SMP MRRR (MKL) MRRR (LAPACK) DC (MKL) Number of threads Number of threads From almost 10 hours to 8.3 seconds. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
56 MR3-SMP: speedup Time in seconds Eigenvalues 4 Eigenvectors LAPACK Number of threads Speedup Ideal Eigenvalues (bisection) Eigenvectors (bisection) Eigenvectors(dqds) Total Number of threads Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
57 1 Introduction 2 Part #1: Solvers 3 Part #2: Eigensolvers 4 Conclusions Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
58 3 stages: before and after Execution time N = 4,289 Reduction Sequential MRRR Backtransformation Number of threads Execution time N = 4,289 Reduction Parallel MRRR Backtransformation Number of threads Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
59 3 stages: before and after Fraction of execution time N = 4,289 Backtransformation Sequential MRRR Reduction Number of threads Fraction of execution time N = 4,289 Backtransformation MR 3 SMP Reduction Number of threads Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
60 Conclusions MRRR-SMP Matthias Petschow (AICES) Eigensolver tailored for multi-cores Almost perfect speedups Routines are available Multi-threaded BLAS for solvers: nice and easy. Multi-threaded BLAS for eigensolvers: not THAT good. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
61 Conclusions MRRR-SMP Matthias Petschow (AICES) Eigensolver tailored for multi-cores Almost perfect speedups Routines are available Multi-threaded BLAS for solvers: nice and easy. Multi-threaded BLAS for eigensolvers: not THAT good. Thank you for the attention. Financial support from the Deutsche Forschungsgemeinschaft (German Research Association) through grant GSC 111 is gratefully acknowledged. Paolo Bientinesi (AICES, RWTH Aachen) MRRR for Multicore Processors MPI Tübingen March 18th, / 38
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